Computer Organization and Design – David A. Patterson, John L. Hennessy – 3rd Edition

Chapter One: Computer Abstractions and Technology

1.1 Introduction
1.2 Below Your Program
1.3 Under the Covers
1.4 Real Stuff: Manufacturing Pentium 4 Chips
1.5 Fallacies and Pitfalls
1.6 Concluding Remarks
1.7 Historical Perspective and Further Reading
1.8 Exercises

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Chapter Two: Instructions: Language of the Computer

2.1 Introduction
2.2 Operations of the Computer Hardware
2.3 Operands of the Computer Hardware
2.4 Representing Instructions in the Computer
2.5 Logical Operations
2.6 Instructions for Making Decisions
2.7 Supporting Procedures in Computer Hardware
2.8 Communicating with People
2.9 MIPS Addressing for 32-bit Immediates and Addresses
2.10 Starting a Program
2.11 How Compilers Optimize
2.12 How Compilers Work: An Introduction
2.13 A C Sort Example to Put It All Together
2.14 Implementing an Object Oriented Language
2.15 Arrays versus Pointers
2.16 Real Stuff: IA-32 Instructions
2.17 Fallacies and Pitfalls
2.18 Concluding Remarks
2.19 Historical Perspective and Further Reading
2.20 Exercises

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Chapter Three: Arithmetic for Computers

3.1 Introduction
3.2 Signed and Unsigned Numbers
3.3 Addition and Subtraction
3.4 Multiplication
3.5 Division
3.6 Floating Point
3.7 Real Stuff: Floating Point in the IA-32
3.8 Fallacies and Pitfalls
3.9 Concluding Remarks
3.10 Historical Perspective and Further Reading
3.11 Exercises

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Chapter Four: Assessing and Understanding Performance

4.1 Introduction
4.2 CPU Performance and Its Factors
4.3 Evaluating Performance
4.4 Real Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors
4.5 Fallacies and Pitfalls
4.6 Concluding Remarks
4.7 Historical Perspective and Further Reading
4.8 Exercises

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Chapter Five: The Processor: Datapath and Control

5.1 Introduction
5.2 Logic Design Conventions
5.3 Building a Datapath
5.4 A Simple Implementation Scheme
5.5 A Multicycle Implementation
5.7 Exceptions
5.8 Microprogramming: Simplifying Control Design
5.9 An Introduction to Digital Design Using a Hardware Design Language
5.10 Real Stuff: The Organization of Recent Pentium Implementations
5.11 Fallacies and Pitfalls
5.12 Concluding Remarks
5.13 Historical Perspective and Further Reading
5.14 Exercises

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Chapter Six: Enhancing Performance with Pipelining

6.1 An Overview of Pipelining
6.2 A Pipelined Datapath
6.3 Pipelined Control
6.4 Data Hazards and Forwarding
6.5 Data Hazards and Stalls
6.6 Branch Hazards
6.7 Using a Hardware Description Language to Describe and Model a Pipeline
6.8 Exceptions
6.9 Advanced Pipelining: Extracting More Performance
6.10 Real Stuff: The Pentium 4 Pipeline
6.11 Fallacies and Pitfalls
6.12 Concluding Remarks
6.13 Historical Perspective and Further Reading
6.14 Exercises

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Chapter Seven: Large and Fast: Exploiting Memory Hierarchy

7.1 Introduction
7.2 The Basics of Caches
7.3 Measuring and Improving Cache Performance
7.4 Virtual Memory
7.5 A Common Framework for Memory Hierarchies
7.6 Real Stuff: A Pentium P4 and the AMD Opteron Memory Hierarchies
7.7 Fallacies and Pitfalls
7.8 Concluding Remarks
7.9 Historical Perspective and Further Reading
7.10 Exercises

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Chapter Eight: Storage, Networks, and Other Peripherals

8.1 Introduction
8.2 Disk Storage and Dependability
8.3 Networks
8.4 Buses: Connecting I/O Devices to Processor and Memory
8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System
8.6 I/O Performance Measures: Examples from Disk and File Systems
8.7 Designing an I/O System
8.8 Real Stuff: A Typical Desktop I/O System
8.9 Fallacies and Pitfalls
8.10 Concluding Remarks
8.11 Historical Perspective and Further Reading
8.12 Exercises

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All of the folling material appears on the CD

Chapter Nine: Multiprocessors

9.1 Introduction
9.2 Programming Multiprocessors
9.3 Multiprocessors Connected by a Single Bus
9.4 Multiprocessors Connected by a Network
9.5 Clusters
9.6 Network Topologies
9.7 Multiprocessors Inside a Chip and Multithreading
9.8 Real Stuff: The Google Cluster of PCs
9.9 Fallacies and Pitfalls
9.10 Concluding Remarks
9.11 Historical Perspective and Further Reading
9.12 Exercises

Appendix A: Assemblers, Linkers, and the SPIM Simulator

A.1 Introduction
A.2 Assemblers
A.3 Linkers
A.4 Loading
A.5 Memory Usage
A.6 Procedure Call Convention
A.7 Exceptions and Interrupts
A.8 Input and Output
A.9 SPIM
A.10 MIPS R2000 Assembly Language
A.11 Concluding Remarks
A.12 Exercises

Appendix B: The Basics of Logic Design

B.1 Introduction
B.2 Gates, Truth Tables, and Logic Equations
B.3 Combinational Logic
B.4 Clocks
B.5 Memory Elements
B.6 Finite State Machines
B.7 Timing Methodologies
B.8 Field Programmable Devices
B.9 Concluding Remarks
B.10 Exercises

Appendix C: Mapping Control to Hardware

C.1 Introduction
C.2 Implementing Combinational Control Units
C.3 Implementing Finite State Machine Control
C.4 Implementing the Next-State Function with a Sequencer
C.5 Translating a Microprogram to Hardware
C.6 Concluding Remarks
C.7 Exercises

Appendix D: A Survey of RISC Architectures for Desktop, Server, and Embedded Computers

D.1 Introduction
D.2 Addressing Modes and Instruction Formats
D.3 Instructions: The MIPS Core Subset
D.4 Instructions: Multimedia Extensions of the Desktop/Server RISCs
D.5 Instructions: Digital Signal-Processing Extensions of the Embedded RISCs
D.6 Instructions: Common Extensions to MIPS Core
D.7 Instructions Unique to MIPS64
D.8 Instructions Unique to Alpha
D.9 Instructions Unique to SPARC v.9
D.10 Instructions Unique to PowerPC
D.11 Instructions Unique to PA-RISC 2.0
D.12 Instructions Unique to ARM
D.13 Instructions Unique to Thumb
D.14 Instructions Unique to SuperH
D.15 Instructions Unique to M32R
D.16 Instructions Unique to MIPS16
D.17 Concluding Remarks
D.18 Acknowledgements
D.19 References